XN Specification

xTIMEcomposer supports a single XN file that contains a single network definition. The network definition is specified as follows:

<?xml version="1.0" encoding="UTF-8"?>
<Network xmlns="http://www.xmos.com"
         xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
         xsi:schemaLocation="http://www.xmos.com http://www.xmos.com">

The XN hierarchy of elements is given in the table below

A Declaration element provides a symbolic name for one or more xCORE Tiles. A single name or an array of names is supported with the form:

tileref identifier

tileref identifier [ constant-expression ]

An equivalent declaration is exported to the header file <platform.h> for use in XC programs. A tileref declaration is associated with physical xCORE tiles by the reference attribute of a Tile element.

Example

<Declaration>tileref master</Declaration>
<Declaration>tileref tile[8]</Declaration>

A Package element refers to a package file that describes the mapping from xCORE ports and links to the pins on the package.

Example

<Package id="L2" Type="XS1-L2A-QF124">

The package named L2 is described in the file XS1-L2A-QF124.xml.

A Node element defines a set of xCORE Tiles in a network, all of which are connected to a single switch. XMOS devices such as the G4 or L1 are both examples of nodes.

The PLL registers can be configured automatically using the attributesSystemFrequency, PllFeedbackDivMin and ReferenceFrequency, or can be configured manually using the attributesPllDividerStageOneReg, PllMultiplierStageReg,PllDividerStageTwoReg and RefDiv. If any of the first three attributes are provided, none of the last four attributes may be provided, and vice versa.

The PLL oscillator input frequency may be specifed using the Oscillator orOscillatorSrc attribute. If the Oscillator attribute is provided theOscillatorSrc attribute must not be provided, and vice versa.

If manual configuration is used, the attributes PllDividerStageOneReg,PllMultiplierStageReg, PllDividerStageTwoReg and RefDiv must be provided and the PLL oscillator input frequency must be specifed. The tools use these values to set the PLL registers and reference clock divider. Information on the PLL dividers can be found in xCORE frequency control documents for XS1-G processors and XS1-L processors.

If the oscillator frequency is specifed and none of the manual PLL attributes are provided, automatic configuration is used. The tools attempt to program the PLL registers such that the target system frequency is achieved, the PLL feedback divider is greater than or equal to the minimum value and the target reference clock frequency is achieved. If any of these constraints cannot be met, the tools issue a warning and report the actual values used.

If the oscillator frequency is not specified, the tools do not attempt to configure the PLL. The PLL registers remain at their initial values as determined by the mode pins.

A network may contain either XS1-L devices or XS1-G devices, but not both.

Example

<Node Id="MyL1" Type="XS1-L1A" Oscillator="20Mhz"
      SystemFrequency="410MHz" ReferenceFrequency="98.5Mhz">

The node named MyL1 is an L1 device, as described in the fileconfig_XS1-L1A.xml.

Tile

<Tile Number="0" Reference="tile[0]">

Port

<Port Location="XS1_PORT_1I" Name="PORT_UART_TX"/>
<Port Location="XS1_PORT_1J" Name="PORT_UART_RX"/>

Boot

Source

<Source Location="SPI:bootFlash"/>

Bootee

<Bootee NodeId="Slave">

Bit

<Bit number="1" direction="0"/>

Link

<Link number="XLA" direction="2"/>

Service

<Service Proto="service_function(chanend c1, chanend c2)">

Chanend

<Chanend Identifier="c" end="23" remote="5"/>

xCONNECT Links are described in the system specification documents (XS1-G:X7507, XS1-L: X1151) and link performance documents (XS1-G: X7561, XS1-L: X2999).

A Link element describes the characteristics of an xCONNECT Link. It must contain exactly two LinkEndpoint children.

Example

<Link Encoding="2wire" Delays="4,4">

LinkEndpoint

<LinkEndpoint NodeId="0" Link="X0LD"/>
<LinkEndpoint RoutingId="0x8000" Chanend="1">

A Device element describes a device attached to an xCORE Tile that is not connected directly to an xCONNECT Link.

xTIMEcomposer recognizes the following attribute values for the attribute nameClass:

SPIFlash

Device is SPI flash memory

SQIFlash

Device is QuadSPI flash memory

FastSQI

Device is QuadSPI flash memory and is using fast boot driver

ARMBridge

Device is ARM flash memory

Use the Type attribute to identify the model of the flash device.

Attribute

<Attribute Name="PORT_SPI_MISO" Value="PORT_SPI_MISO"/>

<Attribute Name="PORT_SQI_SIO" Value="PORT_SQI_SIO"/>

xTIMEcomposer loads and debugs programs on target hardware using JTAG. The JTAGChain element describes a device in the JTAG chain. The order of these elements defines their order in the JTAG chain.

JTAGDevice

<!-- N1 comes before N2 in the JTAG chain -->
<JTAGDevice NodeId="N1">
<JTAGDevice NodeId="N2">