Additional xCORE-Analog or xCORE General Purpose sliceKIT Core Boards can be connected to the first board’s Chain slot via the second board’s Square Slot to add extra processing capability and I/O through extra Slice Cards. The first such board is termed the Master, the remaining boards as Slaves. When there is only one board, it is the Master.

For debugging, an XSYS adaptor board is connected to the Chain Connector of the Master Board to allow connection of an xTAG debug adapter to provide a debug link from a USB host.

The Core Board is powered by a 12V external power supply.

Power input to the sliceKIT Core Board is via a standard barrel jack connector. A standard 12V external power supply should be used to power the board. Each Core Board requires its own 12V supply. This input supply is used to generate the main 5V board supply via a DC-DC converter.

The 5V board supply is then fed to all the Slot connectors as well as powering the Core Board itself. A 3V3 supply is generated by DC-DC converters from the 5V main supply.

The XS1-A16 device uses integrated DC-DC converters to generate the 1V8 and 1V0 supplies required by the device.

The supplies are sequenced to ensure the power up sequence is 5V then 3V3. When the 3V3 supply is good then the system will be released from reset.

The Core Board provides 3V3 and 5V at 0.25A each for a total of approximately 2W per slice.

Debug of the system is via the XSYS adapter board connected to the Chain Connector.

The JTAG signals are connected as shown below.

Presence detect signals are present on both the Chain Connector and Square Slot connectors to allow detection of a connected board and subsequent automatic switching of the JTAG chain. In a system of multiple Core Boards, the Master is the source of the JTAG chain so the system can only be debugged from the master. Other boards will see no devices in the JTAG chain.

The use of xSCOPE is covered in the xCONNECT Links section - see Section xCONNECT Links. The xSCOPE xCONNECT link can be either enabled or disabled via a switch on the XSYS adapter board.

Master Core Boards boot from SPI flash, while slave Core Boards boot from xCONNECT link XLB from the next connected Core Board.

To allow re-use of the SPI boot pins (ports 1A, 1B, 1C, 1D) as signal I/O pins for the Star, Triangle and A slot, a latched bus switch is used which connects the xCORE SPI pins to either the SPI Flash or to the Slice Card Slots. The switch is controlled by X0D42 and X0D43 (P8D6 and P8D7 on Tile 0: on the Triangle slot). Once the device has booted X0D43 is used to enable or disable the SPI interface, X0D42 should then transition from low to high to latch the selection. The SPI selection state is then maintained until the system is reset.

Once this sequence is completed the selection has been latched, therefore X0D42 and X0D43 return to performing their normal functions in the Triangle slot.

If the SPI is not disabled, then Slice Cards in the Star, Triangle or A slots may not function as expected. If there are no Slice Cards in the Star, Triangle or A slot, then it does not matter whether the SPI has been disabled or not. Therefore, applications which require runtime access to the SPI flash should either leave the Star, Triangle and A slots unpopulated or check to ensure that the Card which is in there will be unaffected by the operation of the Flash.

The xTAG debug system can use the boot mode select signal to force all devices in the chain (master and slave Core Boards) to boot from JTAG (don’t boot) for debug purposes.

If not in this mode, the devices will boot from SPI or xCONNECT link as appropriate.

The Chain Connector contains two 5-bit xCONNECT links, XLA and XLB, which can be used for chaining sliceKIT Core Boards together. The links from Tile 0 are connected to the Chain Connector and the Star Slot. The links from Tile 1 are connected to the Square Slot.

The only complication in this system is use of the xSCOPE 2-bit xCONNECT Link. This link overlaps a 4 bit port on the Star Slot connector so it would not be possible to use this for user I/O at the same time as xSCOPE.

To work around this, a switch is present on the XSYS adapter board to either enable or disable the xSCOPE xCONNECT Link.

When disabled, these pins are disconnected from the Chain Connector and are free for use on the Star Slot. When enabled they will work as an xCONNECT link and hence will appear on the relevant pins of the Star Slot.

It is recommended that if a sliceCARD is used in the Star Slot the xSCOPE switch is off on the XSYS Adaptor Card to ensure correct operation of the sliceCARD in the Star slot.

The whole system is held in reset until all power supplies are stable, and reset is connected to all Slice Cards so any circuitry on them can be reset.

It also indicates to the sliceCARDs that their power input is stable. The reset from the xTAG resets the whole system, if required for debugging.

There are two sources for the system clock: an on-board 25MHz oscillator or the CLK signal from the Chain Connector. The system clock source is selected automatically according to the presence signals on the Chain connector.

This means the system clock from a Master Core Board is fed automatically to all of the slave Core Boards so the whole system will operate synchronously.

The system clock is also fed to each of the sliceCARD Slots.

Each xCORE I/O signal is also available on a 0.1” header, next to the Slot that it is connected to.

These connections can be used to connect an oscilloscope or logic analyser, or for interconnection of signals for advanced development work.

The signals are identified on the silkscreen layer of the sliceKIT Core Board, the table below lists their relationship to the internal ports.

The signal assignments for the connectors on the Core Board and sliceCARDs can be seen in the table below.

STAR

SQUARE

TRIANGLE

CIRCLE

CHAIN

MIXED SIGNAL

System Services Slot Signals