The semiconductor industry has remained under serious scrutiny this year. COVID skyrocketed chips into consumer consciousness, and supply chain inefficiencies and geopolitics have kept them there – from cars stuck on assembly lines to the impact of the war in Ukraine.
While obviously important, these issues have often overshadowed the challenges surrounding chip programmability. Some of the most serious threats facing bringing chips to market aren’t logistical, but by design.
At present, many system-on-chip (SoC) designs are within rigid architectures, and operate in different programming environments. Designers are producing individual products for each use case, which slows innovation and makes it harder to bring new devices to market.
Increased time to market and burgeoning costs
There are some core issues at the heart of this:
- Multicore processors are complex and require custom programming, validation, and verification. Developing a new chip for every use case is time-consuming and puts a greater financial burden on manufacturers.
- If every SoC is genuinely unique, then there won’t be a homogenous programming environment consistently available to engineers. Each iteration could require different techniques or toolsets to be used depending on the goals – even if it’s using common hardware, like an Arm core.
- Even if you manage to navigate these challenges successfully, the end product isn’t future proof. Devices are becoming more sophisticated, requiring more precise and disparate specifications as the systems they operate in become more compact and demanding. In a rigid environment and with a set purpose, such designs are much harder to customise.
In short: individualised SoCs require more time and money to make, are difficult to replicate in future designs – and may not be able to contribute to future designs anyway.
The need for versatility and accessibility
To address these challenges, manufacturers need a more agile and accessible development model that provides a genuinely common frame of reference between different products.
This framework needs to enable different forms of processing, and to do so simultaneously — whether for general purpose, digital signal processing (DSP), artificial intelligence (AI), and/or low latency real time deterministic Input/Output (IO). What’s more, it needs to be made possible through the same tools and languages, alongside robust and reliable execution characteristics.
Real-time operating systems like FreeRTOS, combined with traditional embedded programming practices, address this versatility and accessibility. These systems deliver on the expectations of engineers for greater flexibility, while making it easier to understand.
That said, we still need to consider the most effective way to apply this system within multicore architectures. To make good on its potential, this environment needs to make use of flexible hardware platforms that allow engineers to use different processing types, and without the need to continually learn new languages, architectures, or tools.
Solving the programmability problem
While physical supply chain issues have dominated the industry conversation – for good reason – it’s clear the challenge of programmability won’t simply go away. Chip manufacturers are still expected to produce powerful, cost-effective technologies that will keep pace with evolving market demands.
Basing such designs on a flexible multicore chip architecture pre-empts serious financial, logistical, and product-based challenges down the road. Manufacturers maximise their leverage to tackle programming challenges, saving resources while developing a longer-lasting solution.
This flexibility will enable new use cases for our convenience – whether through intelligent automation of smart homes or enabling voice conferencing and other communication technologies that are essential in today’s remote working environment.
At XMOS, we see xcore.ai as that architecture: a high-speed, economical platform purpose-built for the intelligent IoT.
Capable of delivering meaningful versatility without sacrificing performance, designers can balance AI, DSP, I/O and control in a customisable platform upon which they can build and edit their bespoke applications.
With a RISC-V compatible architecture announced for the fourth generation of xcore, the platform now boasts the homogenous programming environment many engineers have desired. For more information on how xcore.ai can unshackle your products from the chains of rigid chip architectures, click here.
