Using RISC-V to define SoCs in software

XMOS has moved to a RISC-V compatible instruction set for its latest xcore® processor that will be available for sampling in 2025.

In this whitepaper we discuss how this processor and its RISC-V compatible architecture can be used.

Using RISC-V to define SoCs in software

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XMOS prides itself on designing and selling processors that can fully implement the digital requirements of modern embedded systems.

XMOS processors can often absorb elements of the design that would traditionally require different classes of components. Where traditionally one may use a microcontroller to control the design, and a DSP to do the signal processing, and maybe a CPLD to interface to a complex digital interface, XMOS processors can do these three tasks in a single device using a single, unified software-based workflow.

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